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RRB JE Stage II : Computer Science & IT Quiz | 19th August 2019

Dear Aspirants,

RRB JE Stage II exam is scheduled to be conducted from 28th August to 1st September 2019. The overall merit for the selection will be made on the basis of the marks scored in stage II, so candidates need to prepare thoroughly for the second stage. To help the aspirants, Adda247 has come up with a study plan in which we will provide you daily quizzes of all technical subjects. The below quiz will be helpful for the candidates who opted the exam group Computer Science & IT in RRB JE stage II.

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Q 1. A solution to the problem where the source and destination hosts are on the same type of network, but there is a different network in between–
(a) Data link
(b) Packet
(c) Tunneling
(d) Hopping

S1. Ans.(c)
Sol. Tunneling is a technique that enables remote access users to connect to a variety of network resources (Corporate Home Gateways or an Internet Service Provider) through a public data network. In general, tunnels established through the public network are point-to-point (though a multipoint tunnel is possible) and link a remote user to some resource at the far end of the tunnel.

Q 2. 128. 167 .152.2 is a Class _______ Address.
(a) A
(b) B
(c) C
(d) D

S 2. Ans.(b)
Sol. Class B has start address and address So, 128.167 .152.2 is a class B address.

Q 3. Race condition occur in which Flip-flop
(a) RS flip flop
(b) JK flip flop
(c) D flip flop
(d)T type flip flop

S 3. Ans.(b)
Sol In JK flip flop as long as clock is high for the input conditions J&K equals to the output changes or complements its output from 1–>0 and 0–>1. This is called toggling output or uncontrolled changing or racing condition. Consider above J&K circuit diagram as long as clock is high and J&K=11 then two upper and lower AND gates are only triggered by the complementary outputs Q and Q(bar). I.e. in any condition according to the propagation delay one gate will be enabled and another gate is disabled. If upper gate is disabled then it sets the output and in the next lower gate will be enabled which resets the flip flop output.

Q 4. A program that places programs into main memory and prepares them for execution–
(a) Linker
(b) Assembler
(c) Loader
(d) Absolute entity

S 4. Ans.(c)
Sol. Loader places the program into memory & prepares them for execution. Loading a program involves reading the contents of executable file (the file containing the program text) into memory and then carrying out other required preparatory tasks to prepare the executable for running. Once loading is complete, the operating system starts the program by passing control to the loaded program code.

Q 5. Half adder is an example of–
(a) Combinational circuit
(b) Sequential circuit
(c) Asynchronous circuit
(d) All of the above

S 5. Ans.(a)
Sol. Half adder is a combinational circuit (actually two circuits. i.e. AND gate and XOR gate) which is used to calculate sum of 2 bits.

Q 6. Which of the following communication modes support two-way traffic but in only one direction at a time?
(a) simplex
(b) half duplex
(c) full duplex
(d) all of the above

S 6. Ans.(b)
Sol. Half duplex data transmission means that data can be transmitted in both directions on a Single carrier but not at the same time.

Q 7. What is the use of functions?
(a) Help to avoid repeating a set of instruction many times
(b) Enhance the logical flow of the program
(c) Makes the debugging task easier
(d) All of the above

S 7 . Ans.(d)
Sol. Most important reason to use functions is reusability. i.e. once a function is defined, it can be used over and over again. A single function can be used in several different (and separate ) programs. Another reasons for using functions is to break down a complex program into logical parts. So, a program can be designed that make sense when read and carrier to understand quickly. This in turn makes the debugging task easier.

Q 8. Which of the following expressions will return 1, if both bits have a value of 1. Otherwise will returns a value of 0?
(a) AND
(b) OR
(c) XOR
(d) None of these

S 8. Ans.(a)
Sol. AND Gate is a logic Gate that will output power if it receives power from all of its input .
Input Output
0 0 0
0 1 0
1 0 0
1 1 1

Q 9. Compiler can diagnose Which type of error?
(a) Grammatical errors only
(b) Logical errors only
(c) Grammatical as well as logical errors
(d) Neither grammatical nor logical error

S 9. Ans.(a)
Sol. Compiler cannot diagnose errors in logic They can diagnose only grammatical errors in writing the source program. For eg. If a programmer (by mistake) write an instruction to divide, instead of multiply this error can’t be detected by compiler. Programs containing such errors will be successful. ly executed and give incorrect answers.

Q10. Full adder is used to–
(a) 2 bit addition
(b) 3 bit addition
(c) 4 bit addition
(d) Addition of unlimited number of bits

S10. Ans.(b)
Sol. A full adder is a logical circuit that performs and addition operation these one bit binary numbers. The full adder produces a sum of the two inputs and carry value.

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